// SPDX-License-Identifier: GPL-2.0 or GPL-3.0
// Copyright © 2018-2019 Ariadne Devos

/* (Extracted and transcluded from <sHT/nospec.h> */

#define _sHT_index_mask(maskp, pos, length) \
	__asm__("cmp %2, %1\n\tsbc %0, %1, %1" : "=&r" (*(maskp)) : "r" ((length)), "rI" ((pos)) : "cc")

#define _sHT_index_reduce(i, n) \
	__asm__("cmp %1,%0;movls %0,#0" : "+r" (*(i)) : "r" (n) : "cc")

/* TODO XXX FIXME: use csdb, isb or some mcr.
  The specific instruction depends on the CPU model and
  Thumb/ARM state.

  I do not have a real ARM system setup for testing yet,
  so do this later (patches welcome).

  Some implementation hints are in the git history. */
/* volatile "memory" is for paranoia, to avoid reordering. */
#define _sHT_speculation_barrier() \
		__asm__ volatile("" : : : "memory")
